A report from Fudzilla has revealed some specs of the first AMD Zen microchip for servers and enterprise computing. Codenamed Naples, the chip is believed to sport 34 cores with 64 threads and an L3 cache of up to 64MB.

Each of the AMD Zen Naples' core has a dedicated 512kb cache. Additionally, a cluster of Zen cores will share an 8MB L3 cache which drives the total amount of L3 cache to 64MB.

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The Zen Naples uses the 14nm FinFET fabrication node technology. It is manufactured by GlobalFoundries and will support the X86 instruction set. The Naples microchip has eight independent memory channels and can support up to 128 lanes of Gen-3 PCIe bus standards. Additionally, Naples can also support up to 32 SATA or NVME drives.

For users who demands fast network interface, the Zen Naples supports 16x10GgE and its controller is believed to be integrated into the chipset. The Naples will be using the SP3 LGA server socket.

Naples will be the first Zen microchip to be released in the enterprise market. The product will have a TDP of 35W for its lowest range and a maximum of 180W for the high-end models.

The Zen Naples will be available in two, four, sixteen, and thirty-core server configurations. Each of these configurations will be released separately. There are speculations that most of the chips will be released in 2017, although some might be released later this year.

In related news, the Zen chip that sports the Greenland/Vega HBM2 powered graphics processing unit with HSA support is also slated to be released.

AMD Chief Executive Officer Lisa Su told Fudzilla that the desktop version of the chip will be released on the market first, followed by the server, notebook, and embedded models.

TagsAMD, AMD Zen, Zen, Zen Naples, AMD Zen Naples, Zen Naples specs, Zen Naples features